Information for Researchers No. 34 | 22 May 2019
Priority Programme “Nano Security: From Nano-Electronics to Secure Systems” (SPP 2253)
The Senate of the Deutsche Forschungsgemeinschaft (DFG, German Research Foundation) established the Priority Programme “Nano Security: From Nano-Electronics to Secure Systems” (SPP 2253). The programme is designed to run for six years. The present call invites proposals for the first three-year funding period.
Vision and Goals
Today’s societies critically depend on electronic systems. Past spectacular cyber-attacks have clearly demonstrated the vulnerability of existing systems and the need to prevent such attacks in the future. The majority of available cyber-defenses concentrate on protecting the software part of electronic systems or their communication interfaces. However, manufacturing technology advancements and the increasing hardware complexity provide a large number of challenges so that the focus of attackers has shifted towards the hardware level. In particular, we saw already evidence for powerful and successful hardware-level attacks that circumvent any software-level security mechanisms, including Rowhammer, Meltdown and Spectre.
These attacks happened on products built using state-of-the-art microelectronic technology, however, we are facing completely new security challenges due to the ongoing transition to radically new types of nano-electronic devices, such as memristors, spintronics, or carbon nanotubes. The use of such emerging nano-technologies is inevitable to continue the exponential improvement of integration density and address the key challenges related to energy efficiency, computing power and performance. Therefore, the entire industry, from foundries to circuit and system designers, are switching to these emerging nano-electronics alongside scaled CMOS technologies in heterogeneous integrated systems. These technologies come with a new set of properties and also facilitate the development of radically different computer architectures. The new technologies and architectures provide new opportunities for achieving security targets, but also raise questions about their vulnerabilities to new types of hardware-related attacks.
The main objective of the Priority Programme is to understand the implications of emerging nano-electronics to system security, and specifically
- to assess possible security threats and vulnerabilities stemming from novel nano-electronics. A central challenge here is to establish the connection between hardware blocks vulnerable to attacks and the consequences of the attacks at the system level;
- to develop innovative approaches for establishing and improving system security based on nano-electronics. Security requires hardware trust anchors, which are hard to design with current technologies. This programme will push the use of new technology features for secure trust anchors.
The Priority Programme will enforce strong cooperation between scientists working on lower and higher levels of abstraction. Such a collaborative approach will result in development of innovative solutions for omnipresent secure hardware trust anchors in future computing systems and infrastructures, including the internet of things. This programme will give security designers a new set of methods and solutions for winning the permanent race between attackers and defenders for the next decade.
Programme Organisation and Project Submission
Successful proposals within the Priority Programme should aim at understanding the implications of emerging nano-electronics to system security. They can investigate positive or negative implications of novel hardware technologies: possible security threats and vulnerabilities stemming from hardware components and architectures, as well as innovative approaches for system security based on nano-electronics. The programme aims at establishing an interdisciplinary collaboration across the abstraction stack of electronic systems, from devices and circuits to protocols and architectures. To this end, the programme will follow a matrix structure with three research areas for horizontal (disciplinary) integration and three Interdisciplinary Groups (IG) for vertical integration.
- Area 1 „Nano-electronics for Security“ will focus on developing and analysing nano-electronic security primitives, such as physical unclonable functions, random number generators, cryptographic blocks, reconfigurable nano-fabrics, or obfuscation/camouflaging structures. We expect that successful applicants for projects in this area will contribute their competencies in nano-electronics and/or circuit design.
- Area 2 „Hardware Security and Cryptography“ will assess and systematically improve the security of hardware primitives from Area 1 and architectures, protocols and design methods from Area 3; it will serve as an intermediary between the other two areas. This area bundles researchers with security and cryptography backgrounds and provides this knowledge to other areas.
- Area 3 „Secure Composition and Integration“ will deal with the integration of secure primitives into larger systems and architectures. It specifically aims at answering the question under which circumstances the security guarantees defined and validated for lower-level primitives translate in higher-order, system- and architecture-level security properties. Work in this area will require background in computer architecture, embedded systems, design methodologies, and/or information theory.
The three Interdisciplinary Groups (IG) within the programme will focus on three broad security objectives: IG1 on hardware-based secret generation; IG2 on secure processing via hardware-supported data separation and isolation; and IG3 on resilience against physical attacks. The programme aims at considering the topic of each IG from the angles of different scientific disciplines from all three areas defined above. For this reason, every project is expected to contribute to at least one IG.
Successful proposals should address security-related scientific problems (e.g., establishing a better understanding of a specific security threat, devising better countermeasures, providing generic security solutions) where emerging hardware technologies or architectures play a decisive role. It is expected that successful applicants will bring in competencies from both fields: security and hardware. To this end, “tandem projects” by two partners from different areas are encouraged. All projects (individual and tandem alike) are expected to belong to at least one of the three above-mentioned areas and to at least one of the three Interdisciplinary Groups IG1, IG2 and IG3. Proposals are requested to explicitly indicate their position in the programme’s matrix structure spanned by the horizontal disciplinary areas and the vertical Interdisciplinary Groups.
Proposals must be written in English and submitted to the DFG by 4 September 2019. Please note that proposals can only be submitted via elan, the DFG’s electronic proposal processing system. To enter a new project within the existing Priority Programme, go to Proposal Submission – New Project/Draft Proposal – Priority Programmes and select “SPP 2253” from the current list of calls.
In preparing your proposal, please review the programme guidelines (form 50.05, section B) and follow the proposal preparation instructions (form 54.01). These forms can either be downloaded from our website or accessed through the elan portal. In addition to submitting your proposal through elan, please send an electronic copy to the programme coordinator.
Applicants must be registered in elan prior to submitting a proposal to the DFG. If you have not yet registered, please note that you must do so by 28 August to submit a proposal under this call; registration requests received after this time cannot be considered. You will normally receive confirmation of your registration by the next working day. Note that you will be asked to select the appropriate Priority Programme call during both the registration and the proposal process.
More information on the Priority Programme is available under:
The elan system can be accessed at:
DFG forms 50.05 and 54.01 can be downloaded at:
For scientific enquiries please contact the Priority Programme coordinator:
- Prof. Dr. Ilia Polian,
Universität Stuttgart, Institut für Technische Informatik (ITI),
Abteilung Hardware-orientierte Informatik,
phone +49 711 685 60764,
Link auf E-Maililia.email@example.com
Questions on the DFG proposal process can be directed to:
- Dr. Andreas Raabe,
phone +49 228 885-2871,
Link auf E-Mailandreas.firstname.lastname@example.org
- Tanja Gemein,
phone +49 228 885-2580,
Link auf E-Mailtanja.email@example.com
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